Forum Discussion
Altera_Forum
Honored Contributor
17 years agoIn a QII 7.2 SP3 test case starting with EP2C15AF256A7 initially selected, I created a FIR Compiler variation with all default settings except "Data Storage" set to "Auto" and "Coefficient Storage" set to M4K. I verified that would compile. Then I changed the Quartus project device selection to EP3C5F256C6 and recompiled without regenerating the FIR Compiler. Compilation was successful with Analysis & Synthesis messages like those below. I don't know that the Cyclone III compilation gave functionally correct results, but it appears to be OK to recompile your Cyclone II FIR Compiler variation with Cyclone III selected in the Quartus project.
--- Quote Start --- Warning: Device family Cyclone III does not have M4K blocks -- using available memory blocks Warning: Assertion warning: Device family Cyclone III does not have M4K blocks -- using available memory blocks --- Quote End ---