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Yes I have one channel with a data rate of 1.82MHz and the clock of the FIR filter is 116.48 MHz -> tdm factor of 64. I set the data valid input continous to high. But with thos settings the filter does not work correctly.
Sorry but I did not understand your whole answer. Is it right to put the valid input to 1 all the time? Or what do you mean with "make valid in 1 in 64 as well to indicate which data slots are valid"
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setting valid to 1 all the time means the filter will see each sample repeated 64 times and so is wrong. valid must 1 for one clock then low for 63 clocks and repeat that pattern.
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