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Altera_Forum
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11 years ago

FIR Compiler II TDM Problems

Hello I' working for the first time on a simple single rate FIR filter implementation with a 13 Bit input data stream. The filter works fine when I use the same frequency for the FIR clock and ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Yes I have one channel with a data rate of 1.82MHz and the clock of the FIR filter is 116.48 MHz -> tdm factor of 64. I set the data valid input continous to high. But with thos settings the filter does not work correctly.

Sorry but I did not understand your whole answer. Is it right to put the valid input to 1 all the time? Or what do you mean with "make valid in 1 in 64 as well to indicate which data slots are valid"