FIFO implementation

Hello Friends,

I am trying to implement a FIFO in the Altera modelsim. Is there any built in primitive for the Arria2GX device that I can use readily ?Can I use the M9K memory block for such an use? If yes , how do I implement this in HDL code using some primitives? I need to design a 36-bit Wide by 512 Deep 18KB FIFO. Is it possible to do so in the SOPC buider? If so, pointers would be greatly appreciated.

Regards,

Vinod.