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Altera_Forum's avatar
Altera_Forum
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12 years ago

Fan-out too weak to trigger SignalTap II ??

I set up two instances in signaltap, one instance contained a signal that would trigger acquisition at rising edge, the other instance contained the same signal but would be triggered by something el...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Yes, you need to select clock signal instead of typing frequency manuallyYou can generate higher frequency clock using PLL for debug purpose only. For example,if your design is working at 50MHz clock frequency,you should create a clock of at least 100MHz frequency using PLL and this clock should be used as a capturing frequency.