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Altera_Forum
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14 years ago

Fan out of global clock pin?

Hello, I wanted to know what is the max fan-out (driving external chip) of - a glabal clock out pin - a normal IO pin I have to design a board where FPGA will have 100 SPI interfaces (3...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

There's no difference in available drive strength between dedicated clock outputs and general I/O pins, only a small difference related to delay skew and jitter.

The question mainly refers to your PCB routing, connected load capacitances and possible termination methods. Connecting 100 SPI slaves isn't impossible but surely restricts reasonable clock frequencies. External clock buffers may be a means to achieve a better signal quality along the SPI chains.