Forum Discussion

Pat2's avatar
Pat2
Icon for New Contributor rankNew Contributor
4 years ago

Failure Analysis on MAX10 FPGA

We have a customer field return, and the failure was isolated to to a bad clock output from pin N4 onthe MAX10 (196 UBGA). This is a singular failure, not a widespread issue, but it is a field retur...
Zawani_M_Intel's avatar
Zawani_M_Intel
Icon for Frequent Contributor rankFrequent Contributor
4 years ago

Dear Pat2,

Thank you for using Intel FPGA Community Forum.

We have sent you a private email to continue support your FA request.

Thank you. Have a great day!

Wani