Failed to Enumerate Stratix IV GX FPGA Development PCIe Board on PCIe 3.0 Bus

I have attached the Stratic IV GX transciever spec section ... it doesn't say anything about Gen3 .

There can still be some items to check.

1. The .sof ... need to trace that back to a design that will say how the Stratic IV GX is being configured.

2. If the Stratix IV GX component is somehow configured to be running at Gen3 speed, some Gen3 systems ( slots ) my not support the number of lanes. In theory , a Gen3 slot should be able to scale back from X8 to X4 to X1 , but this may be an implementation specific issue and the Gen3 slot may for example only support X16 expecting that any Gen3 EP will be a graphics card and X8, X4 or X1 can just use a Gen2 slot.