Honored ContributorHi,
I need to know the cache hit and miss count for a program running on a NIOS II core. I have made attempts at doing this through hardware, which is hindered by the core being encrypted, SignalTap, which only gives me a short trace, and simulation, which I couldn't figure out. Is there a specific way to do it? Thanks
Honored ContributorAn I-cache miss count can obviously be determined by monitoring the instruction port's avalon master cycles.
You might be able to something similar for the data cache, slightly more compex due to uncached requests. The ration of cache misses to clocks might be useful - if not exactly what you are looking for.Honored ContributorThanks, will have a look into that approach.
Was just wondering if there was any way one was supposed to do it. I found a tool called fs2 (http://www.testech-elect.com/fs2/isa-nios.htm) but it looks like it's at least 5 years old and not available for purchase.
