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Altera_Forum's avatar
Altera_Forum
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16 years ago

Exponents in Verilog

Hi, I am pretty new to Verilog and Quartus II, and was hoping someone could help me out. My output is a 12-bit signed register. I get the value of this through an equation, and as part of that ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Thank you very much for the help. Just so that I can learn something through this process, I would really appreciate it if you could tell me how the code is interpreted differently. How is {12'd2) different than 12'd2? Thanks.