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Altera_Forum
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14 years ago

Example designs for communicating two Altera boards

I am looking for example designs or tutorials showing how to communicate two Altera boards using simple protocols. The purpose is to see how the two devices interact by transmitting data back and for...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

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No, that is 11.1. Once you've installed SP1, it'll change to something like:

Quartus 11.1 Build 216 11/23/2011 SJ Full Version

Cheers,

Dave

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I have installed Q II 11.1 SP1, exactly the Build 216 11/23/2011 SJ Full Version. Unfortunately, no change was made in the process of generating any designs that include a On-Chip Memory IP core. The latest one I tried was the JTAG-to-Avalon-MM tutorial you suggested. Hence, I attach here so that you can check whether the issue is coming from the design itself or it is not possible to use On-chip memory cores in Qsys/SOPC Builder in my system (Windows Server 2008).

Thank you very much.