Honored Contributor
Honored ContributorDear Dave,
Please find my comments below. --- Quote Start --- Here's a tutorial that shows you how to use the JTAG-to-Avalon-MM master component and Avalon-MM BFM components: http://www.alterawiki.com/wiki/using_the_usb-blaster_as_an_sopc/qsys_avalon-mm_master_tutorial --- Quote End --- Thank you very much. I find it very useful and will try to study soon. I've just looked through the design and it has one On-chip SRAM. I am not sure if this works in Qsys. Because these days, I learnt to create designs for On-chip memory (both On-chip FIFO and RAM memory cores), but always the generation process hangs with the message "Starting classic module elaboration" in the step of "creating HDL design files for senthesis". I am using Quartus 11.0 and 11.1 and the error occurs whenever the design has On-chip memory core. If you can help to check this or give me a clue to fix the error. Sorry for putting this here:) --- Quote Start --- If your design fits in a Cyclone or Arria series device that has transceivers that operate to 3.125Gbps with a XAUI interface that uses 8/10B encoding, then you can interface to an external PHY (I think Vitesse has some) that will decode-and-reencode the data as 10.3125Gbps SFP+ (with 64/66B encoding). A lower-cost FPGA plus external PHY may be more cost effective than using a high-end FPGA. --- Quote End --- Maybe I will understand this later. For now, I am quite confused. By external PHY, do you mean something like the "Dual XAUI to SFP+ HSMC" board for connecting SFP+ modules in case of Stratix IV GX? As fas as I know, people has tested 10Gbps Ethernet with Stratix IV GT (but in 100G SIV GT dev board) in http://www.alterawiki.com/wiki/10g_ethernet_and_10g_base_r_phy_interoperability_hardware_demonstration_design. Acording to the block diagram, they connect directly to SFP+ Optical module without an external board or PHY. If you can help to correct my understanding and clarify? --- Quote Start --- It depends on what you have to store. If you are only testing, then you can use a PRBS generator to create a lot of random data. --- Quote End --- Testing with PRBS generator is what I want now. But, later on, I need to read data in terms of multimedia file like a movie file from host PC, store in some on-chip memory or buffer, then transmit in packets to other boards. So, I am wondering how should I do that and what is the most suitable solution. I wait for your advice also:) Thanks indeed for your time and explanation. I learnt a lot through this conversation. PLMT.
