Forum Discussion

BIdro's avatar
BIdro
Icon for Occasional Contributor rankOccasional Contributor
4 years ago
Solved

Ethernet RGMII Cyclone V

Hi, I'm trying to implement an ethernet application in RGMII mode with a NIOS processor in a Cyclone V 5CSEMA5F31 FPGA and Quartus Prime standard Edition 18.1. I followed a tutorial for Triple-Sp...
  • BIdro's avatar
    BIdro
    4 years ago

    The solution is to use the Modular Scatter Gather DMA instead of the SGDMA that is obsolete.

  • BIdro's avatar
    BIdro
    Icon for Occasional Contributor rankOccasional Contributor
    4 years ago

    Hi,

    Yes, the signal input "eth_tse_0_mac_rgmii_connection_rgmii_in" of the HPS is connected directly to the input ports of the top_level.

    I saw the project from Rocketboards but the 2 ethernet peripherals are connected to the HPS.

    Instead I need 1 ethernet peripheral to be controlled by NIOS processor in RGMII configuration.

    Thanks,

    Bryan