Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
19 years ago

ESD test on cyclone 2

Hi. We have board designed around Cyclone 2 in 240 pin package(QFP). On this board beside fpga is located memory(DDR RAM) and lvds converters. In the order to done esd test I implemented si...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
19 years ago

From here, it is hard to suggest solutions.

To me it should be possible to "record" the bahavior of the power lines and signal lines with a oscilloscope when ESD tests are taking place. You might be able then to decice, if it is just an error caused by instable power voltage, as I assume. In case of peeks on the lines, additional suppressor diodes in beneath of the chip might help.