Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Error:Connected system timestamp not found on target at expected base address.

Hi, I'm fairly new to FPGA programming, please bear with me. I tried to use Nios II and Quartus II 10.1 on Windows 7(64 bit) to programme a Altera DE2-70 board. I basically followed the...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

the reset input on the SOPC component is active low. Check that you provide the correct polarity and that the signal is high when you try to access the processor.

You can also try to reset the procesor with 

processor_reset $mast

And I'm sorry for forgetting the line to stop the processor before you can read the system id.