Error when load "final" snapshot for multipal partitions
Quartus Prime Pro 13.0, Stratix 10.
Our design is too large, so that we use block based design flow.
There are four core partitions in whole design. We floorplan the four partitions with logic lock region(Fixed/Locked), they have space between with each other, so they are not overlap.
We use four different projects which include each one partition to produce snapshot of each partition.
Compile and extract the *.pdb file correct.
But when the consumer import the four *.pdb file into the project, quartus report error like this:
"The routing element at location "R24_C16_INTERCONNECT_DRIVER_X66_Y219_N0_I0" is being sourced by routing elements at locations "R24_X53_Y219_N0_I85" and "R4_X63_Y219_N0_I24
. This can be caused by improting two or more preserved partitions with overlapping routing or global signals."
I checked the four partition's shape and location. Found that the core logic of partiton is a little beyond the logic lock region, so maybe they overlapped with each other.
I try to remove two partiton, so the space of existing two partition is very large. And above error disappears.
So my question is: how to control the complier strictly constraint logic NOT beyond the logic lock region?