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Altera_Forum's avatar
Altera_Forum
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16 years ago

Error in JTAG chain before reprogramming

I'm trying to reprogram a MAX II CPLD with USB Blaster in JTAG mode.

When I click Auto Detect appears error message “Unable to scan device chain. Can’t scan JTAG chain.”

Testing JTAG chain with the debugger an unknown integrity checking failure occurs.

Obviously the programmer doesn’t start (Error: Can’t access JTAG chain).

I have attempted to program two boards without success. Code compilation doesn’t report error. To assure code fairness I have also implemented a simple flip flop D with elementary logic blocks but I haven’t solved the problem.

What can I do yet? :confused:

Thank you very much for your interest.

Fabio

9 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Does the Max II get all the proper power supplies? Are the JTAG signals routed to the correct pins?

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    You can check the JTAG signals(TCK,TDO,TDI) first， and confirm if they are all ok or not.

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Besides powering the board I have connected pins 2 and 10 of the male header to ground, pin 4 at 3.3 V as indicated in the USB-Blaster Download Cable User Guide.

    Routings for TCK, TDI, TMS were already drawn.

    Process stops immediately so I can’t measure TCK, TDI, TDO signals. From oscilloscope I see only an initial transition when I press Start button in Quartus II Programmer. Then TCK remains low, TDI and TDO high.

    Thanks ;)

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Signals TCK, TDI, TDO, TMS aren’t generated by USB-Blaster?

    Why, if JTAG signals are correctly connected to the corresponding reserved pins of Altera's chip, programming doesn’t start independently of other external connections? Physically the chip consists of enabled or disabled logic ports. Isn’t CPLD structure an array of logic elements?

    If board’s supply is as requested, what forbid programmer to have access to JTAG chain?

    How can I verify correct working of download cable?

    Thank you very much.
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    --- Quote Start ---

    Unable to scan device chain. Can’t scan JTAG chain

    --- Quote End ---

    The message is typically caused by a discontinuos JTAG chain = no response on TDI after a larger number of TCK transitions. Thus it's not very specific, can mean a defective programming adapter, broken cable, wrong PCB wiring, defective device, missing power supply.

    If the programming adapter is working correctly (also the LED would be active during access), you should at least see initial signal bursts on the USB Blaster output signals.
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Other questions about CPLD reprogramming. :confused:

    Where does TCK signal originate? Reading the guide I understand that TCK comes from PC via USB-blaster.

    If JTAG chain is incomplete, how can I observe TCK waveform with an oscilloscope?

    How can I apply boundary-scan testing too?

    Among previous posts I read that CPLD hasn’t to work continuously to be programmed. In my project a DSP provides signals to CPLD inputs. Do you advise me to set these signals to zero?

    For proper functioning, does Quartus II web edition require internet connection?

    Is it possible that problems derive from USB port?

    Suppose that I doubt USB-blaster is damaged. What can I do to receive technical assistance?

    Thank you very much for your interest.

    Fabio
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    There shouldn't be glitches on TDO. If they are actually present (not only caused by limited oscilloscope resolution), something is wrong with your hardware. E.g. an unsufficient ground connection creates ringing clock edges at TCK.