Forum Discussion
Altera_Forum
Honored Contributor
12 years agoError 275062
Hello, My design is a schematic entry utilizing a top level .bdf file consisting of a symbol of a lower level .bdf. The lower level .bdf file consists of symbolized .bdf subcircuits connected wi...
Altera_Forum
Honored Contributor
12 years agoIt did clash. Changing all of the instance names in the project to "inst1" through "instN" cleared the compilation errors.
I'm old school and prefer schematic entry. The arguments in favor of an HDL-based design are uncompelling to many outside the confines of the Altera Forum.