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Honored Contributor
Honored ContributorError 170084 ADC & PLL
Given: Quartus 14.1.1 build190 BeMicro Max 10 10M08DAF484 System clock on N14 Error (170084): Can't route signal "ADC06:inst|ADC06_altpll_0:altpll_0|ADC06_altpll_0_altpll_5q22:sd1|wire_pll...
Altera_ForumHonored Contributor
Honored ContributorI think that a PLL can have only one clock input. You have two clocks, thus you need two PLLs? It might also work with two QSYS clk input blocks.
