Error (10533): VHDL Wait Statement error

hi all;

i have the same problems as sharmakn. while trying to compile project, Quartus II 11.1 Web Edition says:

Error (10533): VHDL Wait Statement error at DS_timer.vhd(23): Wait Statement must contain condition clause with UNTIL keyword

And this's my code :

entity DS_timer is

port( clk : in std_logic;

start : in std_logic;

stop : in std_logic;

reset : in std_logic;

min : out std_logic_vector(6 downto 0);

sec1 : out std_logic_vector(6 downto 0);

sec2 : out std_logic_vector(6 downto 0));

end DS_timer;

Architecture behavioral of DS_timer is

begin

process

variable temp1 : integer range 0 to 10;

variable temp2 : integer range 0 to 6;

variable temp3 : integer range 0 to 10;

begin

wait on reset,clk,start,stop; -- ERROR

if (reset='1') then temp1:=0;temp2:=0;temp3:=0;

elsif (clk'event and clk='1') then

if (start='1') then

wait until stop='0';

temp1:=temp1+1;

if (temp1=10) then temp1:=0; temp2:=temp2+1;

if (temp2=6) then temp2:=0; temp3:=temp3+1;

if (temp3=10) then temp3:=0;

end if;

end if;

end if;

end if;

end if;

--7 code segment--

.......................................................................

end behavioral;

Am I wrong?Can anyone help?

Thanks