Error 10054 -- Can't Open Verilog Design File

In Quartus, go to the Assignments -> Settings menu. In the category list on the left choose Files. In the dialogue box you will see the list of files that are assigned to the project. This list will likely be a full path to your files including the reference to the C drive. You could remove all of these references and add D drive reference via this dialogue box but that is tedious.

What I do is add only the top level entity file here with a relative reference. So if the top level file is in the same directory as your project file no path is necessary. If in a sub-directory then add as "subDirectory/topFile.v" if in a parallel directory then "../parallelDirectory/topFile.v"

Next, go to the Libraries category on the Settings menu and add relative paths to all directories that contain the rest of you verilog source files. You can also add paths to blockDiagram file directories, IP directories or any other source files.

Now you can move your project anywhere and it will still find its source files by first locating the top entity and then search for source files as they are referenced in the project hierarchy.

If you find the dialogue box for modifying these settings a bit cumbersome as I do, then you can edit these settings in the project settings files, project.qsf, using a text editor.