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Altera_Forum
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9 years ago

error : Cyclone V XCVR Illegal constraint of Channel PLL

Hi All, As you can see the attachement "xcvr_pin_planner", I'm using 4 transceivers in the cyclcone V ST FPGA. I use only one "Transceiver reconfiguration controller" configured for 8 reconfi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Hi,

The pin assignement is good. i resolved the problem by Merging TX PLLs In Multiple Transceiver PHY Instances with Quartus Prime.