Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Erratic ring counter

I have built a ring counter using D flip flops in an EMP3128ATC100-10 cpld. I am getting erratic results with clocking sometimes occurring on both rising and falling edges and sometimes no clocking a...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

The most effective way to convert a signal with slow edges into a clean digital clock is a schmitt-trigger respectively a comparator with hysteresis.