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Altera_Forum
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17 years ago

EPM7128AE - strange FlipFlop behaviour

I use the scematic on EPM7128AE you'll see in schaltung.jpg. There is a pixelclock (signal 3) which should comes out of the JK-FlipFlop with half the frequency. This works fine but sometimes there...
Altera_Forum's avatar
Altera_Forum
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17 years ago

Trace2 is related to Trace4 and the signal is generated inside the CPLD and comes out of a Pin of the device.

Trace 3 and 4 are intern signals,which I temporarly routed to an outputpin to trace it with my scope (because I noticed the behaviour of Trace 2).

I think there is a glitch or spike in front of the edge of Trace 3 when it comes to an extra toggle. Sometimes there I can see something like a spike.

You wrote:

Most likely setup or hold timing of inPIX_CLOCK has been violated here.

That's what I can't understand, because inPIX_CLOCK is a signal coming from another device. I have no possibility to change it. So I used a DFF to get it synchronous to my internal clock, which is coming from a 80MHz-Oscillator (on global clock pin 'clk').