Honored Contributor
Honored ContributorIf the device ois powered correctly, the reason for the observed behaviour is most likely a timing violation at the circuit inputs. But these signals are shown in the waveforms, I think. Trace 2 seems unrelated to the circuit? Or is it inPIX_CLOCK shown with an arbitrary delay? In this case, the relation to the input clock should be shown as well.
If trace 3 and 4 are recorded with correct delay, there's apparently a glitch causing the extra toggle. Although it's not fully visible in the waveform, it may be present internal to the CPLD. Most likely setup or hold timing of inPIX_CLOCK has been violated here.
