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Altera_Forum
Honored Contributor
11 years agoepcs does not configure cyclone V
Hello, my ecps on my board does not configure my fpga. I create a jic file and programm the epcs.This works ok. But my programm does not boot. With the nios2flash programmer i can convert sof2...
Altera_Forum
Honored Contributor
11 years agoPlease check the Active Serial source clock is set to either 100Mhz, 50Mhz or 12.5Mhz in the Device and Pin Option settings in Quartus II. If the clock is set to CLKSR, the FPGA will expect external clk input to generate the DCLK.