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Altera_Forum
Honored Contributor
10 years agoThat suggests to me the MSEL pins are not set correctly. If you're not seeing any activity DCLK and nCS remains high I'd suggest that's the place to start. If you think they're correct check the board's assembled properly and that the pins are soldered down.
Check you're not holding nCONFIG low and that nCE is tied or connected directly to GND. Check all power pins are powered. Once the POR circuit is happy and the POR delay has completed configuration should begin. I suspect the POR circuit is happy since you're able to program the EPCS. If it wasn't you wouldn't be able to access the FPGA via JTAG either. Given you can program the EPCS it should be something pretty simple. Cheers, Alex