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Altera_Forum
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19 years agoEP1C3T100C8N FPGA configuration problem
Hi everybody, In my design I use an EP1C3T100C8N cyclone which gets configured from an EPCS1 serial device. EPCS1 is programmed from an external microcontroller that gets the data stream f...
Altera_Forum
Honored Contributor
19 years agoI have solved my problem!
Your idea about bit order was right Vakaras. In fact cyclone datasheet is not very clear about that because in AS mode, waveform shows bit 0 going out last and in PS mode bit 0 is the first byte being passed to FPGA. I had a look inside configuration handbook mainly the chapter about configuration file formats (volume II). For .rpd files it is written "the LSB of each byte in the RPD should be written to the configuration device first". This is for RPD but same rule will apply to hexout file because the content is same (in terms of information, not encoding). (always the same strings 6AD7FF4000B0920900 in header) So I simply reverted bit order for every byte and now everything is OK. Thanks a lot.