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My laptop's lcd datasheet says the LVDS signal must be between +100mv and -100mv
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This sounds like a minimal specification. LVDS standards require a differential voltage of 200 or 250 to 450 mV. But in any case, LVDS spells
low voltage differential signalling.
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Why do i have to use a external resistor network? Is it necessary?
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It necessary to achieve the specified voltage range.
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why do i get +3.3 and -3.3 in the fpga's LVDS pins when i measure them?
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LVDS signals are terminated with a 100 ohm resistor. You get the expected voltage with this termination.
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What's the difference between LVDS and Emulated LVDS?
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Besides requiring the said resistor network, emulated LVDS is slower than dedicated LVDS drivers. Consult the FPGA device manual for the exact specification..
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