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SSilu's avatar
SSilu
Icon for New Contributor rankNew Contributor
6 years ago

EMIF link project error

I encounter following error when try to link project to device. I enabled debug toolkit in emif ip. Quartus 19.3. link_project_to_device -device_name {10AX115H1(.|E2|ES)|10AX115H2|..@1#1-2} -hardwa...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

HI,

Yes, I can see something odd with your ddr_b cal report.

  • add[16:14] and par_in pins result are uncalibrated
  • Did you see this weird result consistently over multiple ddr_b calibration (with either reseting DDR_b or after power cycle your your board) ?

I suggest you to look into below debug option first

  • Have you compare the Quartus design and DDR4 IP setting between ddr_a and ddr_b ? I can help you review as well if you can share with me your Quartus design QAR file
  • Also, is there any on board connection difference between ddr_a connectino vs ddr_b connection ? Again, I can help you review if you can share with me you board schematic pdf file

Thanks.

Regards,

dlim