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Altera_Forum's avatar
Altera_Forum
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15 years ago

embedded software FPGA control

I need your help. I thinking of buying the new MaxV CPLD demo board. I known how to program in C and a beginner with Verilog. I want to write programs like the demo programs that come wi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

I agree. The Nios II soft processor core uses on-chip memories to implement the register set, cache, and debugger memory so it's not possible to synthesize it for any MAX device.