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Altera_Forum's avatar
Altera_Forum
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15 years ago

Editing the Block diagram of a schematic

If I have a schematic and I goto File-> Create/Update-> Create symbol files for current file, it creates a block diagram of the schematic.

The problem is that the position of the input/output pins may not be like I want them to be. But of course I can just edit the block diagram and move the input/output pins to where ever I want.

The problem comes where I have a very huge circuit with a lot of input/output pins, I make a block diagram and spend some time editing it. Then I find out that the circuit needs just a Bit changing and than I have to do File-> Create/Update-> Create symbol files for current file; again. This totally puts the pins in the same old way in the block diagram (which is supposed to get update only but gets rewritten) and than I have to do edit again on the block diagram!

How can I prevent Altera from changing the whole shape of the Block diagram and just perhaps add/remove a pin to/from it. So that I don't have to spend a long time fixing the position of all the pins in the block diagram?

7 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    I don't think you can do that. The best way to handle that case IMHO is to simply not use the graphical tools and connect your blocks using HDL.

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Hello, I experience the same problem and I don't think there is a solution. I believe that not many people use .bdf files. I've posted questions regarding .bdf files and symbols and not many people respond. I can see that within a year or so I'll not be using .bdf in my designs because the Quartus simulator will no longer be available and you will need to use a third party simulator such as ModelSim which doesn't support .bdf files.

    Just my two cents.

    joe
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Hello,

    For joe306, you can have a project with bdf and simulate it with a third party simulator, this is not a problem. In Quartus you open the bdf file and then you click on File-> Create/Update -> Create HDL Design File for Current File

    And Quartus will create a HDL file (with the component and port map) that you can use with ModelSim. This is what I do for my project.

    Else, I find quite strange that bdf files are not very use, because it is far more easier to watch a system in a graphical way.

    Jérôme
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    for simulation in ModelSim you can still convert the BDF to an HDL file by going to File => Create/Update => HDL for Current File.

    learning HDL is still probably a good long term goal. things like generate statements can make instantiating a single component dozens of times just a few lines of code. :)
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Jérôme, the RTL Viewer provides a graphical look at your system and provides a sort of compromise between HDL and schematics.

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    ]I usually don't find the RTL view very user readable ;) I mostly use it to check that the synthesizer understood the code the way I wanted it to.

    As for the graphical input, it is true that it looks easier when you start making FPGA designs. But after a while, you have some needs that are difficult to cover with bdfs:

    • Big projects: in my company we have some old complex projects done entirely in bdf. It spawns on a couple dozen pages, filled with gates, registers, comparators, arithmetic operators... It is very difficult to follow the original author's intentions

    • Comments: it is difficult to comment a graphical file. For a complex project, lack of good comments is asking for trouble on the long run

    • Maintainability: when adding a new functionality, you may have to move half of the components around the screen to make space for your new components. Also as you discovered, adding/removing ports can also take a while

    • Reusability: with a bit of experience, you can write generic HDL code that uses configuration parameters, and that can be reused in several projects and cope with different needs/situations. Big time saver in the long run

    • Source control: I never tried to use CVS/SVN with bdl files, but text files are always easier to put under source control.

    I think al those are good arguments in favor or HDL files. Of course you need to learn it, but once you are used to it, it is faster than using graphical input, and you'll always gain on the long term.