Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorDual Port RAM Init
Hi, I have generated a DPRAM with the Megawizard, and I have used it in my design. When I have simulated it into Modelsim, all was ok. But when I have compiled my FPGA with my design, there w...
Altera_ForumHonored Contributor
Honored ContributorIn the compilation report there is a section about RAM resources, that should give you a list of all the RAM blocs used by the design in the FPGA, their sizes and the file used for initialization. You should have a look there to check that your file was indeed used.
Are you sure your hex file is the right size?
