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Im an EE major just starting on my BSEE senior project. It is to create an FPGA based acoustic echo canceller. We have to use a 1024 tap adaptive FIR filter. It is required that the 1024 tap fir filter be split into 8 smaller filters. The filtering will be done in the time domain using buffers and MACs. How could this be achieved? Can you directly add the outputs of multiple filters in parallel?
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What is the sample rate of the incoming acoustic signal? 100kHz?
FPGAs can be clocked at 1000x this rate, so you essentially have 1000 FPGA clocks per incoming acoustic sample.
Inside the FPGA, you can implement a ~1000 tap filter using a single MAC and two RAM blocks; one with samples and one with coefficients.
The RAM blocks can be dual-ported and double-buffered, so that you can write new coefficients and data to one half of the RAM using one port, while the digital filter logic is reading from the other half of RAM using the other port.
There's really no reason to decide that you have to split the design into 8 separate filters ... but if that is a 'requirement' then perhaps you'll have to do it. It is however possible that your instructions were based on a multi-rate implementation of the same filter. So the first thing I would suggest is getting a clarification on why you have to implement the 8 filter architecture.
Regarding your last question; yes you can add lots of filter outputs in parallel, but you generally do not do this in one FPGA clock cycle, you add pairs of samples in an adder tree (the tree depth is log2 of the number of inputs to add). For your 8 inputs, you have 4 x 2-input adders with 4 outputs (that are 1-bit wider), feeding 2 x 2-input adders with 2 outputs (that are 1-bit wider), feeding a final 2-input adder stage (log2(8) = 3 stages of adders). The final sum is 3-bits wider than the input sample width.
You need to be careful about rounding and truncation operations. Take a read of these notes:
http://www.ovro.caltech.edu/~dwh/correlator/pdf/esc-100paper_hawkins.pdf (
http://www.ovro.caltech.edu/%7edwh/correlator/pdf/esc-100paper_hawkins.pdf)
http://www.ovro.caltech.edu/~dwh/correlator/pdf/esc-100slides_hawkins.pdf (
http://www.ovro.caltech.edu/%7edwh/correlator/pdf/esc-100slides_hawkins.pdf)
Cheers,
Dave
Honored Contributor
