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10 years agoDSP Dev Kit PLL Output Pins Question
I have the DSP development kit that has the Cyclone 2. It has SSRAM and some DDR2 memory. I am testing the SSRAM. I have it working at 100 MHz. In the top level code I am using a PLL to generate 3 clocks: 100 MHz, 100 MHz@180 deg, and 200 MHz (for SignalTap). The SSRAM has a clock that is permanently tied to pin R25. My top level code simply takes the PLL output, C1, and assigns it to sram_clk ( c1 => sram_clk). This works but it generates a WARNING telling me to use a dedicated PLL output pin.
How do I connect a dedicated PLL output pin to R25? How do I find what the PLL output pin(s) are being used? Thanks, SwimTeam