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Altera_Forum's avatar
Altera_Forum
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18 years ago

DRAM and SRAM with Cyclone III

Hello all,

I have some general questions regarding the use of DRAM and SRAM memories with Cyclone III devices.

1) DRAM memory

Do I need to connect the DRAM memory chip directly to the dedicated pins (actually DPCLK, CDPLK.. and so as documented in Handbook chapter 6) or can I use any I/Os pins?

My understand is if I don't connect the device to the dedicated pins I will have to design my own IP (vhdl controller) to control it. But if I use the dedicated pins I could use the macrocell provided by quartus/altera. Am I correct?

2) SRAM memory

Since SRAM memory is easy to control, I can connect it on any others I/Os of the Cyclone III. Is there some SRAM macrocell controller provided by Altera/quartus? Do I need to write it myself?

Thank you in advance for any advice

Best Regards,

-Pierre

14 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    If the DRAM is DDR or DDR2, use the altmemphy megafunction even if you choose not to use the DDR/DDR2 SDRAM High Performance Controller MegaCore for the controller logic. If you do use the MegaCore, it will set up altmemphy automatically.

    Even if you create the datapath yourself instead of using altmemphy, you should use the recommended pins for DQ and DQS. But it is strongly recommended that you use the free altmemphy if you are using a memory type supported by that megafunction.

    I don't know anything about the particular pins you mentioned (and I didn't try to look it up).
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    If you are using SOPC Builder, it might provide the kind of SRAM interface you need.

  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    Thank you for your quick help. I continue to investigate to check if can use any I/Os or if I must use the dedicated pins.

    If someone has already designed a digital board with Cyclone (II or III whatever) using a DRAM device, please let me know.
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    --- Quote Start ---

    Thank you for your quick help. I continue to investigate to check if can use any I/Os or if I must use the dedicated pins.

    If someone has already designed a digital board with Cyclone (II or III whatever) using a DRAM device, please let me know.

    --- Quote End ---

    Hello.

    I did. I connected two DDR SDRAM to CYCLONE III (EP3C25) and everything is working.

    I don't use altmemphy because I need burst length equal to 8 and altmemphy doesn't support it.
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    Hello Webmoon,

    Thank you for your answer. Is it possible to send me your Pinout or the part of your schematic with the DRAMs and the Cyclone III. I would really appreciate. Did you use the dedicated pins for the strobe signals?

    Regards

    -Pierre
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    --- Quote Start ---

    Hello Webmoon,

    Thank you for your answer. Is it possible to send me your Pinout or the part of your schematic with the DRAMs and the Cyclone III. I would really appreciate. Did you use the dedicated pins for the strobe signals?

    Regards

    -Pierre

    --- Quote End ---

    I used DQ and DQS pins according to ALTERA's http://www.altera.com/literature/dp/cyclone3/ep3c25.pdf (http://www.altera.com/literature/dp/cyclone3/ep3c25.pdf) PIN-OUT file.

    Before making PCB board run analysis and synthesis in Quartus to make sure your project is working. Because you can see if Quartus can place some pins and don't forget to assign pins according to standart SSTL-2 Class I if you use DDR SDRAM and don't forget to connect VREF pin of CYCLONE III to 1/2 of 2.5V if CYCLONE III bank is used for DQ and DQS pins.
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    Thank you for your answer. I have to connect only one DRAM device which should use only on DQ/DQS group.

    -Pierre
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    Hello

    i want just to know if the IP for the DDR is FREE because i think that with the MEGA Wizard function the IP has a limited time and we can't put it in the device .

    Also one question I want to know if I can use the CLK pins as a general purpose I/O ?because all I/O pin are used

    Thanks very match.
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    The altmemphy megafunction used by the DDR/DDR2 SDRAM High Performance Controller MegaCore and the data path provided by the older MegaCore are free. Only the controller logic requires a license. The license for the controllers might be included with the Quartus subscription software (not web edition). I think that was the case at one point but don't know whether it still is.

  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    Thank you for your answer. So I can use the MegaCore function and release my project?

    What is the deference between the controller logic and this Mega core function?

    Tanks.