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Altera_Forum
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7 years ago

DQS Input and Output Timing Constraints

Greetings, I have a DDR controller which has a bidirectional DQS (data strobe) signal. In read states, the DDR device is driving DQS, as well as some data bits which have timing relationship to...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
7 years ago

I'm not sure if this helps or not, but attached is a diagram of the bidirectional signals and clocks.

I've tried to color code the signals to help see which registers are involved during reads and which are involved during writes.