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Altera_Forum
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14 years ago

DPA Functionality on LVDS Receiver Block

Hi, Does each channel of LVDS serial data input has the its individual DPA block? As far as I am concerned, DPA will take in the serial data and the optimum clock phase from PLL to compensate...
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Altera_Forum
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14 years ago

I don't know to which FPGA functionality you are exactly referring with "data alignment block". I'm not aware of the term used in Altera product documents.

DPA is only available with some FPGA families. It's usability also depends on specific protocol properties.