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Altera_Forum
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13 years ago

Downloading ELF Process failed of Project

Good night everybody , I have problem of QuartusII 10.1sp1 . My user chip is CycloneII EP2C35FC8 , when my sopc builder use Pll、SDRAM、FLASH、MCU、JTAG , I can run...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Dear Daixiwen

so I need return "SOPC Builder"

and set pll of three output :

system_clk(100Mhz)

sdram_clk(100Mhz -65deg)

onchip_clk(100Mhz -130deg) <-- for on-chip(Enth &#9472; DMA use) clk

your mean is this ?

And I still don't understand your mean of defin the i/o timing ...

can you explanation this mean of defin : ) ?