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Altera_Forum
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13 years ago

Downloading ELF Process failed of Project

Good night everybody , I have problem of QuartusII 10.1sp1 . My user chip is CycloneII EP2C35FC8 , when my sopc builder use Pll、SDRAM、FLASH、MCU、JTAG , I can run...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

You must create an sdc file that lists at least all your external clocks. Then when you compile your design, look for any critical warning saying the timing requirements haven't been met. Have also a look in Timequest for the clock report and check that all your clocks have been detected correctly and are at the right frequency.