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Altera_Forum
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13 years ago

Downloading ELF Process failed of Project

Good night everybody , I have problem of QuartusII 10.1sp1 . My user chip is CycloneII EP2C35FC8 , when my sopc builder use Pll、SDRAM、FLASH、MCU、JTAG , I can run...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Is your design properly constrain and does it meet all timing requirements? When a design stop workings after adding some components usually indicates a timing problem. Adding some components should not cause the processor not to respond on the JTAG interface.