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Altera_Forum's avatar
Altera_Forum
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13 years ago

Downloading design to Cyclone III board

I am new to Altera and am having trouble getting a tutorial design to download to my board through the USB JTAG cable. The board is a Cyclone III LS development kit and the design comes from the QSYS tutorial. The error message that I get is:

Error <209015>: Can't configure device. Expected JTAG ID code 0x020F30DD for device 1, but found JTAG ID code 0x027020DD

I am using the batch_script.sh file in the nios unix window.

I've tried this on two different, identical boards with the same problem. I don't know where to look to fix this problem. Any help on even what to check would be very helpful. Thanks.

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    --- Quote Start ---

    Error <209015>: Can't configure device. Expected JTAG ID code 0x020F30DD for device 1, but found JTAG ID code 0x027020DD

    --- Quote End ---

    This message could occur if the part you synthesized for does not match the part on the board.

    This can happen when you re-target a design from another kit, or even on the same kit if the board contains an engineering sample device, versus the production device.

    Use the JTAG debugger to automatically detect the device, then look at the markings on the physical package and see if both match. Then modify the part number in the Quartus project appropriately.

    Cheers,

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    OK, thanks. I think that the tutorial design is for Cyclone III, but not the LS chip. The JTAG and the device did match (EPCL2007807N), but the device in Quartus was set for another Cyclone chip. So when I changed that the design wouldn't compile anymore with the error message (165011) "altmemphy pin placement was unsuccessful".

    I looked in the constraints file and did not see pin assignments. It looks like those are handled in pin-planner on Altera devices. Is there documentation on how to migrate pin assignments from one device to another? Assuming I've diagnosed this correctly.

    Thanks for your help.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    --- Quote Start ---

    OK, thanks. I think that the tutorial design is for Cyclone III, but not the LS chip. The JTAG and the device did match (EPCL2007807N), but the device in Quartus was set for another Cyclone chip. So when I changed that the design wouldn't compile anymore with the error message (165011) "altmemphy pin placement was unsuccessful".

    --- Quote End ---

    Ok, that makes sense.

    --- Quote Start ---

    I looked in the constraints file and did not see pin assignments.

    --- Quote End ---

    You are supposed to supply the pin constraints, since they are FPGA and board-design specific. The Cyclone III LS kit should have a design example that you can take the pin assignments from. Alternatively, you can create the assignments based on the schematic - thats what I normally do, to be 100% sure I have the correct assignments for all pins used on the board.

    --- Quote Start ---

    It looks like those are handled in pin-planner on Altera devices. Is there documentation on how to migrate pin assignments from one device to another? Assuming I've diagnosed this correctly.

    --- Quote End ---

    There is no automatic way to 'migrate', since a different board design can use a different device, and different pinout. All you can do is take the IP used in one design and connect the top-level signals in the IP to the appropriate pins on your new board - assuming the new board has an identical top-level interface.

    Its not that difficult to manually move a design between boards. Try it, and ask questions if you get stuck.

    If you want to see examples of using Tcl to script the design tools, check out this tutorial:

    http://www.alterawiki.com/wiki/using_the_usb-blaster_as_an_sopc/qsys_avalon-mm_master_tutorial

    Cheers,

    Dave