Honored ContributorHi all,
I get stuck here. I try to download a vhdl code into fpga board using Tools>Programmer. After I click the Programmer, I get the warning box as attached. Then, the .sof file created is scanner_time_limited.sof not as I want which is scanner.sof. What mean by the warning box? Need helps from expert/familiar with this problem..thank you.
Honored ContributorThis happens because your design includes an IP core used in OpenCore evaluation mode, namely without buying a license.
The core will fully work until you keep the programmer attached, whereas it will stop functioning if you press the Ok button and close that message box.Honored ContributorHonored ContributorThis won't affect your code at all, neither the functionality of the unlicensed core.
It simply prevents you from deploying the design on a commercial board, since you need the programmer to remain connected. You can't get rid of that message, unless you buy the licence,Honored ContributorHi Cris72,
I also have the same problem with fanwel. So, how do I can to download the vhdl code into fpga board. Do you have opinion?
