Forum Discussion
Altera_Forum
Honored Contributor
11 years agoupdate:
started new small design with a qsys bus driving the pll_reconfig as per AN661 and tried with all combinations of pll and pll_reconfig on the qsys bus or in the schematic: pll on qsys and pll_reconfig on qsys => wouldnt reconfig pll on schematic and pll_reconfig on qsys => wouldnt reconfig pll on qsys and pll_reconfig on schematic => reconfig worked pll on schematic and pll_reconfig on schematic => reconfig worked the only noticeable difference was the bus width of the mgmt address when the reconfig ip is generated. When outside the qsys bus it is 6 bits wide but when generated on the qsys bus is 8 bits wide.