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Altera_Forum
Honored Contributor
14 years agodoes altlvds have termination 100 ohm setting_
In my Desin, receiver pins from ADC are set to LVDS. According to http://www.altera.com/literature/hb/stx2/stx2_sii52004.pdf (https://imail.datarespons.com/owa/redir.aspx?c=7c40eefd45214092bdb96d...
Altera_Forum
Honored Contributor
14 years ago --- Quote Start --- One more question, in my design, rx is assigned to rx(p), and LVDS standard is selected, the corresponding rx(n) is not connected to anything. Will the fitter assign rx(n) automatically to make a pair of them as a singal channel of rx? If so, is the termination still need? --- Quote End --- The pairs are fixed on the FPGA. Quartus will infer the correct n pin. You can either let Quartus infer it, or you can make a pin assignment to the n pin. You just have to name it correctly, eg., "mysignal" for the p pin, and "mysignal(n)" for the n pin. Cheers, Dave