DMA transfer from FIFO to DDR2

Hello,

I am using Altera DMA controller to tranfer data from the FIFO to the DDR2 controller.But i want to start the DMA request while the FIFO is empty also i need to make the DMA wait while the FIFO is empty .So the transfer is done when the FIFO is empty.

the following is the NIOSII code i use for dma transfer :

--- Quote Start ---

void use_dma_st_mem(void* src,void* dest,alt_u32 length)

{

int rc;

alt_dma_txchan txchan;

alt_dma_rxchan rxchan;

printf("start use_dma_st_mem\n");

/* Create the transmit channel */

if ((txchan = alt_dma_txchan_open("/dev/dma_0")) == NULL)

{

printf ("Failed to open transmit channel\n");

exit (1);

}

/* Create the receive channel */

if ((rxchan = alt_dma_rxchan_open("/dev/dma_0")) == NULL)

{

printf ("Failed to open receive channel\n");

exit (1);

}

/// Streaming from Trasnmit channel

if ((rc = alt_dma_txchan_ioctl (txchan,ALT_DMA_TX_STREAM_ON ,src)) < 0)

{

printf ("Failed to post alt_dma_txchan_ioctl = %i\n", rc);

exit (1);

}

/// configuring receiver channel

if ((rc = alt_dma_rxchan_ioctl (rxchan,ALT_DMA_RX_ONLY_ON

,dest)) < 0)

{

printf ("Failed to post alt_dma_txchan_ioctl = %i\n", rc);

exit (1);

}

/* Post the transmit request */

if ((rc = alt_dma_txchan_send (txchan,

src,

length,

NULL,

NULL)) < 0)

{

printf ("Failed to post transmit request, reason = %i\n", rc);

exit (1);

}

/* Post the receive request */

if ((rc = alt_dma_rxchan_prepare (rxchan,

dest,

length,

done_rx,

NULL)) < 0)

{

printf ("Failed to post read request, reason = %i\n", rc);

exit (1);

}

/* wait for transfer to complete */

printf ("waiting tx_done!\n");

while (!done_rx);

printf ("Transfer successful!\n");

return 0;

}

--- Quote End ---