dma transaction

Avalon components can have "Master" ports and "Slave" ports.

Master interfaces are the ones that take actions and they always talk to slave interfaces.

The NIOS CPU, for example, only has a master interface.

A memory component, for example, only has a slave interface.

So, when the CPU reads/writes from/to memory, the CPU's master port talks to the memory's slave port.

Back to your problem, there are two ways you can handle it, when you configure the Avalonm interface in the SOPC Builder.

- You can have simultaneous multiple master/slave communications at the same time.

- You can set different priorities to each master/slave pair, so the CPU has more priority than the DMA master.