Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

DMA reading multiple PIOs

Hi,

My system contains a total of twenty two (22) 16-bit I/O ports (Altera PIOs) that are used to read external (10 bit) ADCs. My system is running at 85MHz and my maximum sample rate should be around 1usec. I am currently reading these I/O ports individually (using the IORD_ALTERA_AVALON_PIO_DATA command) and I am not getting a fast enough through-put.

Although they are sequential in memory addresses, and each PIO spans 16 memory addresses i.e.;

PIO#1 memory space is 0x0060a100 through 0x0060a10f

PIO#2 memory space is 0x0060a110 through 0x0060a11f

.

.

.

PIO#22 memory space is 0x0060a250 through 0x0060a25f

I am not certain of why there is a 16 address memory span associated with this device, but it may be that each address represents a single bit of the 16 bit value. Since I don’t know how the PIO core is structured, and since the IORD_ALTERA_AVALON_PIO_DATA command returns a 16 bit short value, I feel there must be some manipulation within this routine that fetches/extracts the 16 bits and places them into a ‘short’ structure.

My question is, is there a way to use the Altera ‘DMA’ to perform a read on the Altera I/O’s? What I really need is a way for the DMA to read the PIOs sequentially and transfer this data to SRAM. I believe if this is possible, I could improve my sampling rate by offloading the read function to the DMA.

Thanks in advance for any and all help.

Fred

12 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    I think you'd better design a custom component that either maps your 22 inputs to 22 consecutive addresses, or that creates an Avalon Stream ready to be fed to an SGDMA.

    edit: sorry jake, i didn't see your answer before posting mine
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Jake,

    Thank you for your reply. Hope you had a great weekend. We had some colder weather in our forecast (Bozeman, Montana), so we were busy preparing our garden over the weekend. The first frost of the season was on the car windows this morning…

    From what I was looking at on the scope, I felt there was a longer delay in the reading of the PIOs than what you indicated. I will take a closer look. The read for the PIOs is driven by a timer (RAW_Read). The timer is disabled when it generates an interrupt, and the Nios II program then reads the 22 PIOs. The timer is then re-started. This will provide a little break in the data reading, but it should be acceptable since we will only be reading data at a 1 usec sample rate very rarely. Still, I would like to get as close as possible to this rate.

    The PIOs are read into a buffer, and after the RAW_Read timer has been restarted, there is another routine that pulls the data from the buffer and places it into sequential memory ring buffer. This routine keeps track of the number of reads, and once we have 11 sets of readings (484 bytes), a header and footer are attached to the data to create a 512 byte block. This 512 byte block is then transferred into a USB ring buffer in another memory space. This frees up the reading memory for the high sample rate reads. The data is then accumulated in the USB ring buffer memory until we have (??, currently 10) complete 512 byte blocks to send to the host using USB in ‘BLOCK Mode’ (DMA controlled).

    I feel the balance between the size of the USB ring buffer and the rate at which we are reading data is something I need to play with.

    In addition, I am generating signals for the system to be sent to the 12 DACs. These majority of these signals are relatively slow speed (the one fastest signal is >= ~100 usec), and I will normally only be using half of the DACs to generate signals.

    Sorry for the long windedness but I wanted to give you a little more info on what else was going on. Because of the nature of the system and the requirements, any increase in reading speed/decrease in processing time needs to be implemented. If you have some pointers I can use to do this, I would appreciate it greatly and of course if you have some HDL code that could speed up the reading that would be super.

    As always, thank you very much for your help. Have a great day and take care.

    Fred