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Rk_Athram's avatar
Rk_Athram
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

DisplayPort IP generated design example supports ATX PLL ?

ATX PLL in the DisplayPort IP generated design example Hi, I have gone through the UG :Intel® Arria® 10 DisplayPort IP Core Design Example User Guide UG-20075...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi,


Oh, I didn't realized you are not using DisplayPort IP and in fact targeting other application.


  1. Yes, you need ATX PLL if you are running 10G.
  2. ATX PLL should be able to achieve similar pre-calibration operation as both fPLL and ATX PLL also support reconfiguration profile


Just curious why you need pre-calibration feature ?

  • This is unique for DisplayPort protocol only to shorten the Protocol link up time
  • For other protocol, normally you can perform transceiver or PLL calibration later once you enter into FPGA user mode.


Thanks.


Regards,

dlim


Rk_Athram's avatar
Rk_Athram
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

Hi,

Just curious why you need pre-calibration feature ?

Our application requirement is to change speed dynamically

for " Multiple Reconfiguration Profiles" i may have to calibrate after changing speed every time.

to save the calibration time i found pre calibration used in DisplayPort is efficient.

Regards,

Rajesh