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Altera_Forum's avatar
Altera_Forum
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17 years ago

Digital clock using verilog HDL

Hi, I need to design a clock using 7 segment with stop watch and alarm in Verilog HDL language. As I am new in these HDL I can not find any solution. Can anyone help me to do that? Eraesh
Altera_Forum's avatar
Altera_Forum
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14 years ago

hello. i am browsing over the net and i found this thread. i am a student and i am studying FPGA. we were asked to make a digital clock with alarm. i already have an idea how to do it. my problem is i don't know how to start. we were taught basic codes in school but we don't know how to make a program dealing with a clock. please help me. thank you. :)